Full-custom IC design on Linux Mentor Graphics Corp. announced the availability and immediate release of the entire IC Station suite of products on the Linux (Redhat 6.0) operating platform. According to the company, customers receive all of the functionality, capacity, performance, and automation of the IC Station full-custom IC design solution, which includes schematic capture, netlisting and IC layout, and the increased microprocessor speeds of x86 PC-class computers. The integration of schematic capture (Design Architect-IC) and schematic driven layout (ICgraph SDL) together with the engineering change order capability (ICeco) allows concurrent design and layout development, the company said. The entire IC Station suite of tools (as well as the full custom IC design solutions) is currently available for immediate purchase. Contact Mentor Graphics Wilsonville, OR www.mentor.com

Hardware accelerator The new version of Xcite incorporates AxisÕ proprietary Reconfigurable Computing (RCC) engine using Altera Corp.Õs programmable logic devices (PLDs) to reduce functional verification or simulation time for networking and multimedia designs. Xcite now offers twin-box peripherals for use with a Sun Microsystems workstation. Each box has a capacity of up to 10-million ASIC gates for a maximum design capacity of 20-million gates. To reduce design iteration time, Xcite offers an incremental compilation feature, which automatically detects changes within the Xcite design database and minimizes changes to the affected PLD(s). Only the changed PLD(s) is recompiled. Xcite-twinbox offers a 20-million gate simulation capacity using two external peripherals or twin boxes, the company said. Previous versions of Xcite offered up to 10-million gates within a single external enclosure. XciteÕs design compiler allows design blocks to be compiled separately for faster simulation. Xcite with incremental design compilation and the Xcite-twinbox are shipping now. The price is in the range of $0.09 to $0.15 per gate (USD). Contact Axis Systems, Inc. Sunnyvale, CA www.axiscorp.com

FPGA compiler and Verilog simulator The FPGA Professional Suite, Verilog Edition was designed to help designers meet the design and verification challenges of increasingly sophisticated FPGA designs. The suite consists SynopsysÕ FPGA Compiler II and VCSI

Verilog simulator FPGA Compiler II provides push-button and performance-oriented control with a graphical user interface. FPGA Compiler II contains timing models targeting high-density FPGAs and integration with back-end place-and-route tools. The VCSI Verilog simulator uses native compiled technology to provide simulation at all design phases. VCSI is compatible with VCS and complies with all Verilog standards, including IEEE 1364, Open Verilog Initiative (OVI), programmable language interface (PLI), and SDF. Both VCS and VCSI offer a debugging environment as well as interfaces to leading third-party verification tools. FPGA Professional Suite, Verilog Edition is available immediately. Pricing begins at $11,550 for a one-year technology subscription license. Contact Synopsys, Inc. Mountain View, CA www.synopsys.com

Programmable register editor The Regent programmable register editor now supports a graphical register table, header file generation, and interface to Excel. The toolÕs graphical register table shows how fields are mapped to logical registers, enabling the Òdrag and dropÓ feature. The tool also allows creation of different register sections stored in register blocks that occupy a specific address space. Auto-addressing automatically computes new addresses after any change and reports address over-flows. Using the new version, designers can automatically generate a C-language header file (H file) that captures the register table structure and generates READ/WRITE macros for each field based on its specific size, mapping and access rights. This header file is automatically updated with every change in the register table. In addition to VHDL and Verilog interfaces, the tool now can read and generate Excel tables including lists of registers, fields, signals, and ports. Available immediately as a stand-alone module or as a licensed option with Visual HDL, Regent runs under UNIX on Sun Solaris and HP-UX, and on PCs under Windows 98/NT. Regent pricing starts at US $15,000. Contact Innoveda, Inc. Marlboro, MA www.innoveda.com

Embedded system tool The Driveway Lite family supports the simplified hardware requirements of evaluation boards, which typically use a small number of peripherals compared with production embedded designs. Priced accordingly, Driveway Lite provides an entry-level price point for automated BSP generation. The tool automatically generates BSPs in a number of supported real-time operating system (RTOS) environment. As a result, embedded systems engineers can use a proprietary RTOS, a commercial RTOS, or even no RTOS at all. Processor-specific versions of Driveway Lite are priced at $7,500, royalty free. Driveway Lite is initially available in processor-specific versions for Motorola MPC823, MPC823E, MPC850, MPC850SAR, MPC855T, MPC860, MPC860P, MPC860SAR, MPC860T, and MPC8260 microprocessors with support for additional manufacturers and embedded processors available by the end of the year. Contact Aisys, Inc. Santa Clara, CA www.aisysinc.com